debug(intr): #GP 打印 CR0/CR4

movaps 地址 0x7d780 16 对齐仍 #GP——需确认 SSE 是否真启用(CR4.OSFXSR bit9)
与 CR0.EM(bit2)。若 OSFXSR=0 则 enable_sse 未生效(可能是 stub 解析问题)。
This commit is contained in:
TermiNexus committed 2026-08-26 19:40:13 +08:00
1 parent 7b084803f5
commit ff802c2eed
1 file changed
+10 -3
+10 -3
View File
@@ -128,12 +128,19 @@ def isrCommonhandler(interrupt: t.CInt):
gp_rip: t.CUInt64T = 0
gp_err: t.CUInt64T = 0
gp_rsp: t.CUInt64T = 0
gp_cr4: t.CUInt64T = 0
gp_cr0: t.CUInt64T = 0
c.Asm(f"""mov {c.AsmOut(gp_rip, t.ASM_DESCR.OUTPUT_REG)}, [_fault_rip]
mov {c.AsmOut(gp_err, t.ASM_DESCR.OUTPUT_REG)}, [_fault_err]
mov {c.AsmOut(gp_rsp, t.ASM_DESCR.OUTPUT_REG)}, [_fault_rsp]""",
mov {c.AsmOut(gp_rsp, t.ASM_DESCR.OUTPUT_REG)}, [_fault_rsp]
mov rax, cr4
mov {c.AsmOut(gp_cr4, t.ASM_DESCR.OUTPUT_REG)}, rax
mov rax, cr0
mov {c.AsmOut(gp_cr0, t.ASM_DESCR.OUTPUT_REG)}, rax""",
op=[t.ASM_DESCR.CLOBBER_RAX])
gp_buf: t.CArray[t.CChar, 100]
viperlib.snprintf(c.Addr(gp_buf), 100, "[GP] rip=0x%lx err=0x%lx rsp=0x%lx\n", gp_rip, gp_err, gp_rsp)
gp_buf: t.CArray[t.CChar, 140]
viperlib.snprintf(c.Addr(gp_buf), 140, "[GP] rip=0x%lx err=0x%lx rsp=0x%lx cr4=0x%lx cr0=0x%lx\n",
gp_rip, gp_err, gp_rsp, gp_cr4, gp_cr0)
serial.puts(gp_buf)
s: sched.Scheduler | t.CPtr = sched._sched_ptr
# 如果调度器未初始化,直接进入安全停机状态