fix(tpv): 补齐 asm_arg_cap 声明与嵌套数组 element 预算漏改

上一条提交(3426139)中两处改动实际未落盘(编辑动作报告成功但文件内容未变),
导致 TransPyC 编译报 NameError: 未定义名称 'asm_arg_cap'。

- CallGenCBuiltin:补 asm_arg_cap 声明(按操作数个数给足内联汇编实参表容量),
  args_buf 改用该容量分配(此前 4 处用法已改为 asm_arg_cap,声明却缺席)
- TranslatorGenMixin:嵌套数组 element 预算 192 → 768(含子数组类型前缀)
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TermiNexus committed 2026-10-03 21:17:41 +08:00
1 parent 3426139d03
commit 94b174c8a0
2 files changed
+5 -2

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+4 -1
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@@ -1418,7 +1418,10 @@ novirtual class CallGenCBuiltin(CallGenBase.CallGenBase):
# ============================================================
# 6. 构建参数列表文本(仅输入操作数)
# ============================================================
args_buf: str = pool.alloc(ASM_ARGS_BUF_SIZE)
# 每个实参 = 类型文本(MLIR 内联具名结构体完整字段体,可达 512 字节)
# + 值名;固定 ASM_ARGS_BUF_SIZE(512) 只够一个短类型,须按操作数个数给足。
asm_arg_cap: sizet = sizet(operand_count + 1) * 544 + 64
args_buf: str = pool.alloc(asm_arg_cap)
if args_buf is None:
return None
args_buf[0] = '\0'
+1 -1
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@@ -242,7 +242,7 @@ novirtual class TranslatorGenMixin:
pass
if is_nested_arr != 0:
cnt_total_n: sizet = sizet(arr_count)
buf_size_n: sizet = 128 + cnt_total_n * 192
buf_size_n: sizet = 128 + cnt_total_n * 768
buf_n: str = pool.alloc(buf_size_n)
if buf_n is None:
return None