fix(narrow): 清理注解式整数窄化（Converter/TypeGenCType/CallGenLeafKit/ClassGenEnum）

CDefine 查询返回 int64 处按下游用法定型：回传给 int 的用显式 int(...)，流入 int64 目标的加宽为 int64；sizet 数组元素赋给 int 的用 int(...)

App/lib/Stub/StubGen/Converter.vp

@@ -38,7 +38,7 @@ def _eval_binop_valid(node: ast.AST*) -> int:
         nm: ast.Name* = ast.Name*(node)
         if nm.id is not None:
             # Look up in the local CDefine table
-            val: int = _lookup_cdefine_for_pyi(nm.id)
+            val: int64 = _lookup_cdefine_for_pyi(nm.id)
             if _pyi_cdefine_found() != 0: return 1
         return 0
     return 0

App/lib/core/Gen/Call/CallGenLeafKit.vp

@@ -1068,7 +1068,7 @@ novirtual class CallGenLeafKit(CallGenCBuiltin.CallGenCBuiltin):
                         # CDefine at registration; only registered int CDefines are supported.
                         dnm: ast.Name* = ast.Name*(dnode)
                         if dnm.id is not None:
-                            cdef_v: int = self.Gen.TypeGenCDef.lookup_cdefine_constant(dnm.id)
+                            cdef_v: int64 = self.Gen.TypeGenCDef.lookup_cdefine_constant(dnm.id)
                             if self.Gen.TypeGenCDef.is_cdefine_found() != 0:
                                 kinds[di] = ast.CONST_INT
                                 ints[di] = cdef_v

App/lib/core/Gen/Class/ClassGenEnum.vp

@@ -758,7 +758,7 @@ novirtual class ClassGenEnum(ClassGenBase.ClassGenBase):
         tail_node: mlirlite.ParamNode* = None
 
         for pos in range(total_positions):
-            psize: int = position_max_sizes[pos]
+            psize: int = int(position_max_sizes[pos])
             field_ty: mlirlite.LLVMType* = i32_ty
             if psize > 4: field_ty = i64_ty
             pnode: mlirlite.ParamNode* = mlirlite.new_param_node(pool, field_ty)
@@ -816,7 +816,7 @@ novirtual class ClassGenEnum(ClassGenBase.ClassGenBase):
 
         # Add payload fields (positions 1+, i32 or i64)
         for pos in range(1, total_positions):
-            psize2: int = position_max_sizes[pos]
+            psize2: int = int(position_max_sizes[pos])
             payload_ty: mlirlite.LLVMType* = i32_ty
             if psize2 > 4: payload_ty = i64_ty
             field_name_buf: str = pool.alloc(16)

App/lib/core/Gen/Type/TypeGenCType.vp

@@ -460,11 +460,11 @@ class TypeGenCType(TypeGenBase.TypeGenBase):
             if nm.id is None:
                 self.ConstEvalOk = 0
                 return 0
-            val: int = self.Gen.TypeGenCDef.lookup_cdefine_constant(nm.id)
+            val: int = int(self.Gen.TypeGenCDef.lookup_cdefine_constant(nm.id))
             if self.Gen.TypeGenCDef.is_cdefine_found() == 0:
                 # Local miss: cross-module CDefine lookup via the HandlesExpr delegate.
                 if (from_imports is not None or imported_modules is not None) and pool is not None:
-                    x_val: int = self.Gen.ExprGenCdef._lookup_cross_module_cdefine(pool, nm.id, from_imports, imported_modules)
+                    x_val: int = int(self.Gen.ExprGenCdef._lookup_cross_module_cdefine(pool, nm.id, from_imports, imported_modules))
                     if self.Gen.TypeGenCDef.is_cdefine_found() != 0:
                         self.ConstEvalOk = 1
                         return x_val
@@ -491,7 +491,7 @@ class TypeGenCType(TypeGenBase.TypeGenBase):
                             fi_buf[1] = ':'
                             for mi in range(mod_len): fi_buf[2 + mi] = at_mod.id[mi]
                             fi_buf[2 + mod_len] = '\0'
-                            av: int = self.Gen.ExprGenCdef._lookup_cross_module_cdefine(pool, at.attr, fi_buf, imported_modules)
+                            av: int = int(self.Gen.ExprGenCdef._lookup_cross_module_cdefine(pool, at.attr, fi_buf, imported_modules))
                             if self.Gen.TypeGenCDef.is_cdefine_found() != 0:
                                 self.ConstEvalOk = 1
                                 return av