TermiNexus
a518f75b24
- devfs.vp: string.split 传 PATH_BUFFER_SIZE（配合 split 新增容量参数） - fat32_types.vp: lfn_extract 越界钳制（base+i > MAX_LFN 返回 -1） - sheet.vp: gfx.Renderer 实参修正为 (fb, zb, w, h)（原单参导致 w/h=0 渲染空操作） - 同批包含 VKernel 其余既有移植改动与 vpsdk/Apps/Libs 工作区内容
94 lines
3.5 KiB
Plaintext
94 lines
3.5 KiB
Plaintext
import t, c
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import asm
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PCI_CONFIG_ADDR: t.CDefine = 0xCF8
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PCI_CONFIG_DATA: t.CDefine = 0xCFC
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PCI_CLASS_SERIAL_USB: t.CDefine = 0x0C03
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PCI_CLASS_SERIAL_UHCI: t.CDefine = 0x0C0300
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PCI_CLASS_SERIAL_OHCI: t.CDefine = 0x0C0310
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PCI_CLASS_SERIAL_EHCI: t.CDefine = 0x0C0320
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PCI_CLASS_SERIAL_XHCI: t.CDefine = 0x0C0330
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PCI_CMD_IO_SPACE: t.CDefine = 0x0001
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PCI_CMD_BUS_MASTER: t.CDefine = 0x0004
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class pci_device(t.CStruct):
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bus: uint8
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dev: uint8
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func: uint8
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vendor_id: uint16
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device_id: uint16
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class_code: uint32
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irq: uint8
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bar: t.CArray[uint32, 6]
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def pci_read32(bus: uint8, dev: uint8, func: uint8, offset: uint8) -> uint32:
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addr: uint32 = 0x80000000 | (uint32(bus) << 16) | (uint32(dev) << 11) | (uint32(func) << 8) | (uint32(offset) & 0xFC)
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asm.outl(PCI_CONFIG_ADDR, addr)
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return asm.inl(PCI_CONFIG_DATA)
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def pci_write32(bus: uint8, dev: uint8, func: uint8, offset: uint8, value: uint32):
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addr: uint32 = 0x80000000 | (uint32(bus) << 16) | (uint32(dev) << 11) | (uint32(func) << 8) | (uint32(offset) & 0xFC)
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asm.outl(PCI_CONFIG_ADDR, addr)
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asm.outl(PCI_CONFIG_DATA, value)
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def pci_read16(bus: uint8, dev: uint8, func: uint8, offset: uint8) -> uint16:
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val: uint32 = pci_read32(bus, dev, func, offset)
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shift: uint32 = (uint32(offset) & 0x02) * 8
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return uint16((val >> shift) & 0xFFFF)
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def pci_read8(bus: uint8, dev: uint8, func: uint8, offset: uint8) -> uint8:
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val: uint32 = pci_read32(bus, dev, func, offset)
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shift: uint32 = (uint32(offset) & 0x03) * 8
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return uint8((val >> shift) & 0xFF)
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def pci_get_class(bus: uint8, dev: uint8, func: uint8) -> uint32:
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cls: uint8 = pci_read8(bus, dev, func, 0x0B)
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sub: uint8 = pci_read8(bus, dev, func, 0x0A)
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proto: uint8 = pci_read8(bus, dev, func, 0x09)
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return (uint32(cls) << 16) | (uint32(sub) << 8) | uint32(proto)
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def pci_get_bar(bus: uint8, dev: uint8, func: uint8, bar_idx: uint8) -> uint32:
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return pci_read32(bus, dev, func, 0x10 + bar_idx * 4)
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def pci_enable_device(dev: pci_device | t.CPtr):
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cmd: uint16 = pci_read16(dev.bus, dev.dev, dev.func, 0x04)
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cmd = cmd | PCI_CMD_IO_SPACE | PCI_CMD_BUS_MASTER
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pci_write32(dev.bus, dev.dev, dev.func, 0x04, uint32(cmd))
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def pci_fill_device(bus: uint8, dev_n: uint8, func: uint8, out: pci_device | t.CPtr):
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out.bus = bus
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out.dev = dev_n
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out.func = func
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out.vendor_id = pci_read16(bus, dev_n, func, 0x00)
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out.device_id = pci_read16(bus, dev_n, func, 0x02)
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out.class_code = pci_get_class(bus, dev_n, func)
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out.irq = pci_read8(bus, dev_n, func, 0x3C)
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i: int
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for i in range(6):
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out.bar[i] = pci_get_bar(bus, dev_n, func, uint8(i))
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_uhci_dev: pci_device
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_uhci_found: int = 0
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def find_uhci() -> uint16:
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global _uhci_dev, _uhci_found
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bus: uint8
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dev_n: uint8
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func: uint8
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for bus in range(1):
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for dev_n in range(32):
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for func in range(8):
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vendor: uint16 = pci_read16(bus, dev_n, func, 0x00)
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if vendor == 0xFFFF: continue
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cls: uint32 = pci_get_class(bus, dev_n, func)
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if cls == PCI_CLASS_SERIAL_UHCI:
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pci_fill_device(bus, dev_n, func, c.Addr(_uhci_dev))
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pci_enable_device(c.Addr(_uhci_dev))
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_uhci_found = 1
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bar: uint32 = _uhci_dev.bar[4]
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io_base: uint16 = uint16(bar & 0xFFFE)
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return io_base
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return 0
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