debug(apic): 读回 LINT0 与 APIC BASE MSR,验证 EXTINT 配置是否生效

PIT 正常(cnt=1109)但中断不送达。读回验证:
- lint0=0x700 → EXTINT 未屏蔽(正确);0x10700 → 被屏蔽;其它 → 写入失败
- apic_base_msr bit11 → APIC 使能状态
用后移除。
This commit is contained in:
TermiNexus committed 2026-08-26 18:32:21 +08:00
1 parent 471cfa16bf
commit 9ff53aa1fa
1 file changed
+8
+8
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@@ -78,6 +78,14 @@ class ViperKernel:
apic.early_init()
serial.puts("[main] apic init done\n")
# [DBG] 读回 LAPIC LINT0 与 APIC BASE MSR,验证 EXTINT 配置(用后移除)
_lint0: t.CUInt32T = apic.read(0x350)
_apic_msr: t.CUInt64T = cpu.msr_read(apic.IA32_APIC_BASE)
_abuf: t.CArray[t.CChar, 96]
viperlib.snprintf(c.Addr(_abuf), 96, "[APIC] lint0=0x%x apic_base_msr=0x%lx\n",
_lint0, _apic_msr)
serial.puts(c.Addr(_abuf))
asm.sti()
serial.puts("[main] sti done\n")