chore(diag): [VAR-DIAG] 增加 alloca 地址打印 - 定位 pos/npos 共享存储(值语义被破坏)

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TermiNexus committed 2026-10-16 00:12:06 +08:00
1 parent 6196bdfe56
commit 832b0a5706
1 file changed
+6 -4
+6 -4
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@@ -2254,8 +2254,10 @@ novirtual class AssignGenMixin:
# Ensure the full cross-module struct definition is available (for alloca)
self.Gen.StructGen.ensure_struct_def_in_module(pool, trans.Module, var_ty)
# [TEMP-DIAG] 变量声明的槽类型文本(定位完删除):
# class 标注若被解析成 `ptr`,槽就是"指针"而非值本位(`CAM: V3` / `col: V3` 现场)。
alloca: mlirlite.Value* = self.Gen.VarGen._alloca_at_entry(builder, var_ty)
# [TEMP-DIAG] 变量声明的槽类型 + **alloca 地址**(定位完删除):
# `npos = pos + Δ` 之后 pos.y 变化 ⇒ 若 pos/npos 的 slot 地址相同,说明两个变量
# 共用了同一块存储(槽复用/RVO 回填错槽),值语义被破坏。
vtb: str = "?"
bt0: str = pool.alloc_tagged(512, memhub.DETSITE_ASSIGNGEN_578)
if bt0 is not None:
@@ -2268,8 +2270,8 @@ novirtual class AssignGenMixin:
fn0: str = None
if trans._cur_func is not None: fn0 = mlirlite.function_get_name(trans._cur_func)
if fn0 is None: fn0 = "?"
stdio.printf("[VAR-DIAG] fn=%s name=%s vptr=%d var_ty=%s\n", fn0, nm0, vptr0, vtb)
alloca: mlirlite.Value* = self.Gen.VarGen._alloca_at_entry(builder, var_ty)
stdio.printf("[VAR-DIAG] fn=%s name=%s vptr=%d slot=0x%x var_ty=%s\n",
fn0, nm0, vptr0, uint64(alloca) if alloca is not None else uint64(0), vtb)
if alloca is not None:
if self.Gen.VarGen.define_var(trans.SymTab, nm.id, alloca) == 0:
# Store the annotation's class name; pass pool so generic Subscript yields the mangled name