From 15a210bedee13f7dae4c004bfff3dadd3b5f80cd Mon Sep 17 00:00:00 2001
From: TermiNexus <wyt18222152539wyt@163.com>
Date: Thu, 15 Oct 2026 23:00:04 +0800
Subject: [PATCH] =?UTF-8?q?chore(diag):=20=E5=8F=98=E9=87=8F=E5=A3=B0?=
 =?UTF-8?q?=E6=98=8E=E6=A7=BD=E7=B1=BB=E5=9E=8B=20[VAR-DIAG]=20-=20?=
 =?UTF-8?q?=E5=AE=9A=E4=BD=8D=20class=20=E6=A0=87=E6=B3=A8=E6=98=AF?=
 =?UTF-8?q?=E5=90=A6=E8=A2=AB=E8=A7=A3=E6=9E=90=E6=88=90=20ptr?=
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---
 App/lib/core/Gen/AssignGenMixin.vp | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/App/lib/core/Gen/AssignGenMixin.vp b/App/lib/core/Gen/AssignGenMixin.vp
index 00dad54..5acb69e 100644
--- a/App/lib/core/Gen/AssignGenMixin.vp
+++ b/App/lib/core/Gen/AssignGenMixin.vp
@@ -2254,6 +2254,21 @@ novirtual class AssignGenMixin:
 
         # Ensure the full cross-module struct definition is available (for alloca)
         self.Gen.StructGen.ensure_struct_def_in_module(pool, trans.Module, var_ty)
+        # [TEMP-DIAG] 变量声明的槽类型文本（定位完删除）：
+        #   class 标注若被解析成 `ptr`，槽就是"指针"而非值本位（`CAM: V3` / `col: V3` 现场）。
+        vtb: str = "?"
+        bt0: str = pool.alloc_tagged(512, memhub.DETSITE_ASSIGNGEN_578)
+        if bt0 is not None:
+            mlirlite.TypePrint(bt0, 512, var_ty, pool)
+            vtb = bt0
+        vptr0: int = -1
+        if var_ty is not None: vptr0 = self.Gen.ExprGenBase.is_ptr_type(var_ty)
+        nm0: str = nm.id
+        if nm0 is None: nm0 = "?"
+        fn0: str = None
+        if trans._cur_func is not None: fn0 = mlirlite.function_get_name(trans._cur_func)
+        if fn0 is None: fn0 = "?"
+        stdio.printf("[VAR-DIAG] fn=%s name=%s vptr=%d var_ty=%s\n", fn0, nm0, vptr0, vtb)
         alloca: mlirlite.Value* = self.Gen.VarGen._alloca_at_entry(builder, var_ty)
         if alloca is not None:
             if self.Gen.VarGen.define_var(trans.SymTab, nm.id, alloca) == 0: