TermiNexus
f19d25782f
删除 lib/includes/t.py、c.py，类型模型迁入 lib/core/TypeSystem.py；移除 IsTModule/_T_MODULE_NAMES 等名称判据，语法糖与内部标记统一为裸名；builtins 的 sizet/intN/uintN/fast/least/uchar/short/long 等改为编译器内建短名。
608 lines
29 KiB
Python
608 lines
29 KiB
Python
from __future__ import annotations
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from typing import TYPE_CHECKING, Any
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import vast as ast
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import re
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import llvmlite.ir as ir
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if TYPE_CHECKING:
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from lib.core.translator import Translator
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from lib.core.LlvmCodeGenerator import LlvmCodeGenerator
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from lib.core.Handles.HandlesBase import BaseHandle
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from lib.core import TypeSystem
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# ---------------------------------------------------------------
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# asm 模板重写用的正则**预编译**（性能：避免每次 `re.sub(字面量, ...)` 都要做
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# "模式串哈希 → re 模块级缓存查找"。语义与逐字写法完全一致，模式串一字未改）。
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# ---------------------------------------------------------------
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# Intel 语法模板里的 `%0`/`%1` 占位操作数 → `$0`/`$1`
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_RE_INTEL_FMT_OPERAND: re.Pattern[str] = re.compile(r'%(\d+)')
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# Intel 语法模板里的 `%name` 具名操作数 → 去掉前缀 `%`
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_RE_INTEL_FMT_NAMED: re.Pattern[str] = re.compile(r'%([a-zA-Z][a-zA-Z0-9]*)')
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# asm 模板里 `call <符号>` 的函数名重写（保留 `call ` 前缀，只改写符号名）
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_RE_ASM_CALL: re.Pattern[str] = re.compile(r'(call\s+)(\w+)')
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# 猴子补丁 llvmlite.ir.InlineAsm 以支持 asm_dialect 参数
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# 添加保护避免重复补丁
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_InlineAsmPatched = getattr(ir.InlineAsm, '_transpyc_patched', False)
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if not _InlineAsmPatched:
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_OrigInlineAsmInit = ir.InlineAsm.__init__
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_OrigInlineAsmDescr = ir.InlineAsm.descr
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def _patched_inline_asm_init(self, ftype, asm, constraint, side_effect=False, asm_dialect=None):
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_OrigInlineAsmInit(self, ftype, asm, constraint, side_effect)
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self.asm_dialect = asm_dialect
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def _patched_inline_asm_descr(self, buf):
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sideeffect = 'sideeffect' if self.side_effect else ''
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dialect_str = getattr(self, 'asm_dialect', None)
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if dialect_str == 'intel':
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dialect = 'inteldialect'
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else:
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dialect = ''
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fmt = 'asm {sideeffect} {dialect} "{asm}", "{constraint}"'
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buf.append(fmt.format(sideeffect=sideeffect, dialect=dialect, asm=self.asm,
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constraint=self.constraint))
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ir.InlineAsm.__init__ = _patched_inline_asm_init
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ir.InlineAsm.descr = _patched_inline_asm_descr
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ir.InlineAsm._transpyc_patched = True
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class ExprAsmHandle(BaseHandle):
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@staticmethod
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def _format_to_dialect(asm_format: str | None) -> str | None:
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"""将用户指定的 format 参数转换为 LLVM asm_dialect 值"""
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fmt: str = asm_format.lower() if asm_format else 'intel'
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if fmt == 'att':
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return 'att'
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elif fmt == 'arm':
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return None # ARM 没有专门的 dialect 标记
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else:
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return 'intel' # 默认 Intel
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def _HandleAsmLlvm(self, Node: ast.Call) -> ir.Value | None:
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Gen: LlvmCodeGenerator = self.Trans.LlvmGen
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op_arg: Any = None
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input_arg: Any = None
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output_arg: Any = None
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asm_format: str = 'Intel' # 汇编格式: Intel / AT&T / ARM
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for kw in Node.keywords:
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if kw.arg == 'op':
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op_arg = kw.value
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elif kw.arg in ('input', 'inp', 'inputs'):
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input_arg = kw.value
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elif kw.arg in ('output', 'out', 'outputs'):
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output_arg = kw.value
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elif kw.arg == 'format':
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if isinstance(kw.value, ast.Constant) and isinstance(kw.value.value, str):
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asm_format = kw.value.value
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if len(Node.args) >= 1:
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pos_op: Any = None
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if len(Node.args) >= 2 and op_arg is None:
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pos_op = Node.args[1]
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return self._HandleAsmWithOpLlvm(Node.args[0], op_arg or pos_op, input_arg, output_arg, asm_format)
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if len(Node.args) < 2:
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return ir.Constant(ir.IntType(32), 1)
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args: list[ast.AST] = Node.args
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if len(args) == 4:
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output_type_arg: ast.AST = args[0]
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asm_template_arg: ast.AST = args[1]
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constraint_arg: ast.AST = args[2]
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clobber_arg: ast.AST = args[3]
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output_type: ir.Type | None = self._infer_expr_llvm_type(output_type_arg)
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if not output_type:
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output_type = ir.IntType(32)
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asm_template: str = ''
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if isinstance(asm_template_arg, ast.Constant) and isinstance(asm_template_arg.value, str):
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asm_template = self._prepare_intel_asm(self._mangle_asm_calls(asm_template_arg.value))
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constraint: str = ''
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if isinstance(constraint_arg, ast.Constant) and isinstance(constraint_arg.value, str):
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constraint = constraint_arg.value
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clobber: str = ''
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if isinstance(clobber_arg, ast.Constant) and isinstance(clobber_arg.value, str):
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clobber = clobber_arg.value
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full_constraint: str = constraint
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func_type: ir.FunctionType = ir.FunctionType(output_type, [])
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asm_dialect: str | None = self._format_to_dialect(asm_format)
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inline_asm: ir.InlineAsm = ir.InlineAsm(func_type, asm_template, constraint, side_effect=True, asm_dialect=asm_dialect)
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result: Any = Gen.builder.call(inline_asm, [], name="asm_result")
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return result
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elif len(args) >= 2:
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output_type_arg: ast.AST = args[0]
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asm_template_arg: ast.AST = args[1]
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output_type: ir.Type | None = self._infer_expr_llvm_type(output_type_arg)
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if not output_type:
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output_type = ir.IntType(32)
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asm_template: str = ''
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if isinstance(asm_template_arg, ast.Constant) and isinstance(asm_template_arg.value, str):
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asm_template = self._prepare_intel_asm(self._mangle_asm_calls(asm_template_arg.value))
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output_constraints: list[str] = []
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output_values: list[Any] = []
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if len(args) > 2 and isinstance(args[2], (ast.List, ast.Tuple)):
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for item in args[2].elts:
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if isinstance(item, (ast.List, ast.Tuple)) and len(item.elts) >= 2:
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constraint_node: ast.AST = item.elts[0]
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value_node: ast.AST = item.elts[1]
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if isinstance(constraint_node, ast.Constant) and isinstance(constraint_node.value, str):
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output_constraints.append(constraint_node.value)
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value: Any = self.HandleExprLlvm(value_node)
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if value:
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output_values.append(value)
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input_constraints: list[str] = []
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input_values: list[Any] = []
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if len(args) > 3 and isinstance(args[3], (ast.List, ast.Tuple)):
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for item in args[3].elts:
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if isinstance(item, (ast.List, ast.Tuple)) and len(item.elts) >= 2:
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constraint_node: ast.AST = item.elts[0]
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value_node: ast.AST = item.elts[1]
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if isinstance(constraint_node, ast.Constant) and isinstance(constraint_node.value, str):
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input_constraints.append(constraint_node.value)
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value: Any = self.HandleExprLlvm(value_node)
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if value:
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input_values.append(value)
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clobbers: list[str] = []
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if len(args) > 4 and isinstance(args[4], (ast.List, ast.Tuple)):
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for item in args[4].elts:
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if isinstance(item, ast.Constant) and isinstance(item.value, str):
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clobbers.append(item.value)
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constraint_parts: list[str] = []
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for oc in output_constraints:
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constraint_parts.append(oc)
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input_start_idx: int = len(output_constraints)
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for ic in input_constraints:
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constraint_parts.append(ic)
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full_constraint: str = ",".join(constraint_parts)
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if clobbers:
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if full_constraint:
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full_constraint += ","
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for c in clobbers:
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full_constraint += f"~{{{c}}}"
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operands: list[Any] = output_values + input_values
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param_types: list[ir.Type] = [v.type for v in operands]
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func_type: ir.FunctionType = ir.FunctionType(output_type, param_types)
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asm_dialect: str | None = self._format_to_dialect(asm_format)
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inline_asm: ir.InlineAsm = ir.InlineAsm(func_type, asm_template, full_constraint, side_effect=False, asm_dialect=asm_dialect)
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result: Any = Gen.builder.call(inline_asm, operands, name="asm_result")
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return result
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return None
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def _prepare_intel_asm(self, template: str) -> str:
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template = _RE_INTEL_FMT_OPERAND.sub(r'$\1', template)
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template = _RE_INTEL_FMT_NAMED.sub(r'\1', template)
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return template
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def _normalize_asm_template(self, template: str) -> str:
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lines = template.split('\n')
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if len(lines) <= 1:
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return template
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first_line = lines[0]
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rest_lines = lines[1:]
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stripped = []
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for line in rest_lines:
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s = line.lstrip()
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if s:
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stripped.append(s)
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else:
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stripped.append('')
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return '\n'.join([first_line] + stripped)
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@staticmethod
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def _intrinsic_marker(expr: ast.AST) -> str | None:
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"""识别内建操作数标记调用，返回规范名或 None
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规范名为裸名写法：
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- 内联汇编：AsmInp / AsmOut（小写 asminp / asmout 等价）
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- LLVM IR：LInp / LOut（小写 irinp / irout 等价）
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"""
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if not isinstance(expr, ast.Call):
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return None
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func: ast.AST = expr.func
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if isinstance(func, ast.Name):
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if func.id in ('AsmInp', 'AsmOut', 'LInp', 'LOut'):
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return func.id
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if func.id == 'asminp':
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return 'AsmInp'
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if func.id == 'asmout':
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return 'AsmOut'
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if func.id == 'irinp':
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return 'LInp'
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if func.id == 'irout':
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return 'LOut'
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return None
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return None
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def _process_joined_str_template(self, node: ast.AST, out_input_ops: list[Any], out_input_constraints: list[str],
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out_output_ops: list[Any], out_output_constraints: list[str]) -> str:
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if not isinstance(node, ast.JoinedStr):
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if isinstance(node, ast.Constant) and isinstance(node.value, str):
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return node.value
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return ''
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raw_parts: list[tuple[str, str | int]] = []
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for value in node.values:
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if isinstance(value, ast.Constant) and isinstance(value.value, str):
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raw_parts.append(('text', value.value))
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elif isinstance(value, ast.FormattedValue):
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expr: ast.AST = value.value
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_marker: str | None = self._intrinsic_marker(expr)
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if _marker == 'AsmInp':
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if expr.args:
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v: Any = self.HandleExprLlvm(expr.args[0])
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if v:
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c: str = 'r'
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if len(expr.args) >= 2:
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c = self._parse_asm_descr(expr.args[1])
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if not c:
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c = 'r'
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out_input_ops.append(v)
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out_input_constraints.append(c)
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raw_parts.append(('input', len(out_input_ops) - 1))
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elif _marker == 'AsmOut':
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if expr.args:
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target_ptr: Any = self._get_var_ptr_for_asm(expr.args[0])
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if target_ptr:
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v = target_ptr
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else:
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v = self.HandleExprLlvm(expr.args[0])
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if v:
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c: str = '=r'
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if len(expr.args) >= 2:
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c = self._parse_asm_descr(expr.args[1])
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if not c:
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c = '=r'
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if not c.startswith('='):
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c = '=' + c
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out_output_ops.append(v)
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out_output_constraints.append(c)
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raw_parts.append(('output', len(out_output_ops) - 1))
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elif not (isinstance(expr, ast.Call) and isinstance(expr.func, ast.Attribute)):
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# 非标记的属性调用不收集，其余表达式按普通输入操作数处理
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fallback: Any = self.HandleExprLlvm(expr)
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if fallback and isinstance(fallback.type, ir.IntType):
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out_input_ops.append(fallback)
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out_input_constraints.append('r')
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raw_parts.append(('input', len(out_input_ops) - 1))
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else:
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raw_parts.append(('text', ''))
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num_outputs: int = len(out_output_ops)
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parts: list[str] = []
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for kind, data in raw_parts:
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if kind == 'text':
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parts.append(data)
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elif kind == 'output':
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parts.append(f'%{data}')
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elif kind == 'input':
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parts.append(f'%{num_outputs + data}')
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return ''.join(parts)
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_X86_REGISTERS = frozenset({
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'rax', 'rbx', 'rcx', 'rdx', 'rsi', 'rdi', 'rbp', 'rsp',
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'r8', 'r9', 'r10', 'r11', 'r12', 'r13', 'r14', 'r15',
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'eax', 'ebx', 'ecx', 'edx', 'esi', 'edi', 'ebp', 'esp',
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'ax', 'bx', 'cx', 'dx', 'si', 'di', 'bp', 'sp',
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'al', 'bl', 'cl', 'dl', 'ah', 'bh', 'ch', 'dh',
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'sil', 'dil', 'bpl', 'spl',
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'r8d', 'r9d', 'r10d', 'r11d', 'r12d', 'r13d', 'r14d', 'r15d',
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'r8w', 'r9w', 'r10w', 'r11w', 'r12w', 'r13w', 'r14w', 'r15w',
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'r8b', 'r9b', 'r10b', 'r11b', 'r12b', 'r13b', 'r14b', 'r15b',
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})
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def _mangle_asm_calls(self, template: str) -> str:
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Gen: LlvmCodeGenerator = self.Trans.LlvmGen
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sha1: str = getattr(Gen, 'module_sha1', '')
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if not sha1:
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return template
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def replace_call(m: re.Match[str]) -> str:
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prefix: str = m.group(1)
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func_name: str = m.group(2)
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if func_name.lower() in self._X86_REGISTERS:
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return m.group(0)
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mangled: str = Gen._mangle_func_name(func_name)
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if '.' in mangled:
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return f'{prefix}\\22{mangled}\\22'
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return f"{prefix}{mangled}"
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return _RE_ASM_CALL.sub(replace_call, template)
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def _HandleAsmWithOpLlvm(self, asm_template_arg: ast.AST, op_arg: ast.AST | None = None, input_arg: ast.AST | None = None, output_arg: ast.AST | None = None, asm_format: str = 'Intel') -> ir.Value:
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Gen: LlvmCodeGenerator = self.Trans.LlvmGen
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input_ops: list[Any] = []
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input_constraints: list[str] = []
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output_ops: list[Any] = []
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output_constraints: list[str] = []
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if output_arg and isinstance(output_arg, (ast.List, ast.Tuple)):
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for item in output_arg.elts:
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if self._intrinsic_marker(item) == 'AsmOut':
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if len(item.args) >= 1:
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target_ptr: Any = self._get_var_ptr_for_asm(item.args[0])
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if target_ptr:
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output_ops.append(target_ptr)
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else:
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value: Any = self.HandleExprLlvm(item.args[0])
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if value:
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output_ops.append(value)
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constraint: str = '=r'
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if len(item.args) >= 2:
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base_constraint: str = self._parse_asm_descr(item.args[1])
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if base_constraint:
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if base_constraint.startswith('='):
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constraint = base_constraint
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else:
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constraint = '=' + base_constraint
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output_constraints.append(constraint)
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raw_template: str
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if isinstance(asm_template_arg, ast.JoinedStr):
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raw_template = self._normalize_asm_template(
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self._process_joined_str_template(
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asm_template_arg, input_ops, input_constraints, output_ops, output_constraints
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)
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)
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elif isinstance(asm_template_arg, ast.Constant) and isinstance(asm_template_arg.value, str):
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raw_template = self._normalize_asm_template(asm_template_arg.value)
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else:
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raw_template = ''
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raw_template = self._mangle_asm_calls(raw_template)
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asm_dialect: str | None = self._format_to_dialect(asm_format)
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asm_template: str
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if asm_format == 'AT&T':
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asm_template = raw_template # AT&T 不需要转换
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elif asm_format == 'ARM':
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asm_template = raw_template # ARM 不需要转换
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else:
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asm_template = self._prepare_intel_asm(raw_template) # Intel → LLVM IR 格式
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if input_arg and isinstance(input_arg, (ast.List, ast.Tuple)):
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for item in input_arg.elts:
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if self._intrinsic_marker(item) == 'AsmInp':
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if len(item.args) >= 1:
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value: Any = self.HandleExprLlvm(item.args[0])
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if value:
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input_ops.append(value)
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constraint: str = 'r'
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if len(item.args) >= 2:
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constraint = self._parse_asm_descr(item.args[1])
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if not constraint:
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constraint = 'r'
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input_constraints.append(constraint)
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elif isinstance(item, (ast.List, ast.Tuple)) and len(item.elts) >= 2:
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value_node: ast.AST = item.elts[0]
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descr_node: ast.AST = item.elts[1]
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value: Any = self.HandleExprLlvm(value_node)
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if value:
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input_ops.append(value)
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constraint: str = self._parse_asm_descr(descr_node)
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if not constraint:
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constraint = 'r'
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input_constraints.append(constraint)
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clobbers: list[str] = []
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if op_arg and isinstance(op_arg, (ast.List, ast.Tuple)):
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for item in op_arg.elts:
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clobber: str = self._parse_asm_descr(item)
|
||
if clobber:
|
||
clobbers.append(clobber)
|
||
|
||
constraint_parts: list[str] = []
|
||
for oc in output_constraints:
|
||
c: str = oc if oc.startswith('=') else ('=' + oc)
|
||
constraint_parts.append(c)
|
||
for ic in input_constraints:
|
||
if ic in ('d', 'edx', 'rdx'):
|
||
constraint_parts.append('{dx}')
|
||
else:
|
||
constraint_parts.append(ic)
|
||
|
||
full_constraint: str = ",".join(constraint_parts)
|
||
|
||
constraint_to_reg: dict[str, str] = {
|
||
'a': 'rax', 'b': 'rbx', 'c': 'rcx', 'd': 'rdx',
|
||
'S': 'rsi', 'D': 'rdi',
|
||
'A': 'rax', 'U': 'r8',
|
||
}
|
||
used_regs: set[str] = set()
|
||
for ic in input_constraints:
|
||
if ic in constraint_to_reg:
|
||
used_regs.add(constraint_to_reg[ic])
|
||
for oc in output_constraints:
|
||
base_oc: str = oc.lstrip('=').lstrip('+')
|
||
if base_oc in constraint_to_reg:
|
||
used_regs.add(constraint_to_reg[base_oc])
|
||
|
||
if clobbers:
|
||
has_memory: bool = 'memory' in clobbers
|
||
if has_memory and output_ops:
|
||
clobbers = [c for c in clobbers if c != 'memory']
|
||
clobber_final: list[str]
|
||
if asm_format == 'ARM':
|
||
# ARM 不需要 x86 的 e→r 寄存器名转换
|
||
clobber_final = [c for c in clobbers if c not in used_regs]
|
||
else:
|
||
clobber_64bit: list[str] = []
|
||
for c in clobbers:
|
||
if c in ['eax', 'ebx', 'ecx', 'edx', 'esi', 'edi', 'ebp', 'esp']:
|
||
clobber_64bit.append(c.replace('e', 'r'))
|
||
else:
|
||
clobber_64bit.append(c)
|
||
clobber_final = [c for c in clobber_64bit if c not in used_regs]
|
||
if clobber_final:
|
||
if full_constraint:
|
||
full_constraint += ","
|
||
full_constraint += ",".join([f"~{{{c}}}" for c in clobber_final])
|
||
|
||
if output_ops:
|
||
single_out: bool = len(output_ops) == 1
|
||
if single_out:
|
||
op: Any = output_ops[0]
|
||
ret_type: ir.Type
|
||
if isinstance(op, ir.AllocaInstr):
|
||
ret_type = op.type.pointee
|
||
elif isinstance(op, ir.GlobalVariable):
|
||
ret_type = op.type.pointee
|
||
elif isinstance(op, (ir.GEPInstr, ir.CastInstr)):
|
||
ret_type = op.type.pointee if isinstance(op.type, ir.PointerType) else op.type
|
||
else:
|
||
ret_type = op.type
|
||
else:
|
||
def _get_ret_type(op: Any) -> ir.Type:
|
||
if isinstance(op, (ir.AllocaInstr, ir.GlobalVariable)):
|
||
return op.type.pointee
|
||
return op.type
|
||
ret_type = ir.LiteralStructType([_get_ret_type(op) for op in output_ops])
|
||
if isinstance(ret_type, ir.PointerType) and isinstance(ret_type.pointee, ir.IdentifiedStructType):
|
||
ret_type = ir.IntType(64)
|
||
operands: list[Any] = input_ops
|
||
param_types: list[ir.Type] = [op.type for op in operands]
|
||
func_type: ir.FunctionType = ir.FunctionType(ret_type, param_types)
|
||
inline_asm: ir.InlineAsm = ir.InlineAsm(func_type, asm_template, full_constraint, side_effect=len(output_ops) == 0, asm_dialect=asm_dialect)
|
||
result: Any = Gen.builder.call(inline_asm, operands, name="asm_result")
|
||
if single_out:
|
||
target: Any = output_ops[0]
|
||
if isinstance(target, ir.AllocaInstr):
|
||
if target.type.pointee != result.type:
|
||
i64t: ir.IntType = ir.IntType(64)
|
||
iv: Any = Gen.builder.ptrtoint(result, i64t)
|
||
ptr: Any = Gen.builder.bitcast(target, ir.PointerType(i64t))
|
||
Gen.builder.store(iv, ptr)
|
||
else:
|
||
Gen.builder.store(result, target)
|
||
elif isinstance(target, (ir.GlobalVariable, ir.GEPInstr, ir.CastInstr)):
|
||
target_pointee: ir.Type = target.type.pointee
|
||
if target_pointee != result.type:
|
||
if isinstance(target_pointee, ir.PointerType) and isinstance(result, ir.Instruction) and result.type == ir.IntType(64):
|
||
ptr_val: Any = Gen.builder.inttoptr(result, target_pointee)
|
||
Gen.builder.store(ptr_val, target)
|
||
else:
|
||
i64t: ir.IntType = ir.IntType(64)
|
||
iv: Any = Gen.builder.ptrtoint(result, i64t)
|
||
ptr: Any = Gen.builder.bitcast(target, ir.PointerType(i64t))
|
||
Gen.builder.store(iv, ptr)
|
||
else:
|
||
Gen.builder.store(result, target)
|
||
else:
|
||
dst: Any = Gen._allocaEntry(result.type)
|
||
Gen.builder.store(result, dst)
|
||
else:
|
||
for i, out_op in enumerate(output_ops):
|
||
val: Any = Gen.builder.extract_value(result, i, name=f"asm_out_{i}")
|
||
target: Any = out_op if isinstance(out_op, ir.AllocaInstr) else Gen._allocaEntry(val.type)
|
||
if isinstance(target, ir.AllocaInstr) and target.type.pointee != val.type:
|
||
i64t: ir.IntType = ir.IntType(64)
|
||
iv: Any = Gen.builder.ptrtoint(val, i64t)
|
||
ptr: Any = Gen.builder.bitcast(target, ir.PointerType(i64t))
|
||
Gen.builder.store(iv, ptr)
|
||
else:
|
||
Gen.builder.store(val, target)
|
||
else:
|
||
operands: list[Any] = input_ops
|
||
param_types: list[ir.Type] = [op.type for op in operands]
|
||
func_type: ir.FunctionType = ir.FunctionType(ir.VoidType(), param_types)
|
||
inline_asm: ir.InlineAsm = ir.InlineAsm(func_type, asm_template, full_constraint, side_effect=True, asm_dialect=asm_dialect)
|
||
Gen.builder.call(inline_asm, operands, name="asm_call")
|
||
return ir.Constant(ir.IntType(32), 1)
|
||
|
||
def _get_var_ptr_for_asm(self, node: ast.AST) -> ir.Value | None:
|
||
Gen: LlvmCodeGenerator = self.Trans.LlvmGen
|
||
if isinstance(node, ast.Name):
|
||
var_name: str = node.id
|
||
if var_name in Gen.variables and Gen.variables[var_name] is not None:
|
||
ptr: Any = Gen.variables[var_name]
|
||
if isinstance(ptr, ir.AllocaInstr):
|
||
return ptr
|
||
if isinstance(ptr, ir.GlobalVariable):
|
||
return ptr
|
||
elif isinstance(node, ast.Attribute):
|
||
obj_ptr: Any = self._get_var_ptr_for_asm(node.value)
|
||
if obj_ptr is not None:
|
||
obj_type: ir.Type = obj_ptr.type.pointee
|
||
if isinstance(obj_type, ir.PointerType) and isinstance(obj_type.pointee, ir.IdentifiedStructType):
|
||
Loaded: Any = Gen.builder.load(obj_ptr, name="asm_attr_Load")
|
||
struct_type: ir.IdentifiedStructType = obj_type.pointee
|
||
class_name: str | None = Gen._resolve_class_for_var(node.value.id) if isinstance(node.value, ast.Name) else None
|
||
if class_name:
|
||
offset: int = Gen._get_member_offset(node.attr, class_name)
|
||
gep: Any = Gen.builder.gep(Loaded, [ir.Constant(ir.IntType(32), 0),
|
||
ir.Constant(ir.IntType(32), offset)],
|
||
inbounds=True)
|
||
return gep
|
||
for idx, elem_type in enumerate(struct_type.elements):
|
||
gep: Any = Gen.builder.gep(Loaded, [ir.Constant(ir.IntType(32), 0),
|
||
ir.Constant(ir.IntType(32), idx)],
|
||
inbounds=True)
|
||
return gep
|
||
elif isinstance(obj_type, ir.IdentifiedStructType):
|
||
class_name: str | None = Gen._resolve_class_for_var(node.value.id) if isinstance(node.value, ast.Name) else None
|
||
if class_name:
|
||
offset: int = Gen._get_member_offset(node.attr, class_name)
|
||
gep: Any = Gen.builder.gep(obj_ptr, [ir.Constant(ir.IntType(32), 0),
|
||
ir.Constant(ir.IntType(32), offset)],
|
||
inbounds=True)
|
||
return gep
|
||
for idx, elem_type in enumerate(obj_type.elements):
|
||
gep: Any = Gen.builder.gep(obj_ptr, [ir.Constant(ir.IntType(32), 0),
|
||
ir.Constant(ir.IntType(32), idx)],
|
||
inbounds=True)
|
||
return gep
|
||
return None
|
||
|
||
def _parse_asm_descr(self, expr: ast.AST) -> str:
|
||
if isinstance(expr, ast.BinOp):
|
||
left_val: str = self._parse_asm_descr(expr.left)
|
||
right_val: str = self._parse_asm_descr(expr.right)
|
||
return left_val + right_val
|
||
|
||
elif isinstance(expr, ast.Attribute):
|
||
if isinstance(expr.value, ast.Name) and expr.value.id == 'ASM_DESCR':
|
||
# 裸名 ASM_DESCR.XXX
|
||
AttrName: str = expr.attr
|
||
return getattr(TypeSystem.ASM_DESCR, AttrName, "")
|
||
|
||
elif isinstance(expr, ast.Constant):
|
||
return expr.value
|
||
|
||
return ""
|
||
|
||
def _infer_expr_llvm_type(self, expr: ast.AST) -> ir.Type | None:
|
||
if isinstance(expr, ast.Name):
|
||
type_name: str = expr.id
|
||
if hasattr(TypeSystem, type_name):
|
||
ctype: Any = getattr(TypeSystem, type_name)
|
||
if isinstance(ctype, type) and issubclass(ctype, TypeSystem.CType):
|
||
size: Any = getattr(ctype, 'Size', None)
|
||
if size is not None:
|
||
return ir.IntType(size)
|
||
if type_name == 'CFloat':
|
||
return ir.FloatType()
|
||
elif type_name == 'CDouble':
|
||
return ir.DoubleType()
|
||
elif isinstance(expr, ast.Attribute):
|
||
if isinstance(expr.value, ast.Name) :
|
||
return self._infer_expr_llvm_type(ast.Name(id=expr.attr, ctx=ast.Load()))
|
||
return None
|